A Non-Enumerative Technique for Measuring Path Correlation in Digital Circuits

The correlation between the physical paths of a digital circuit has important implications in various design automation problems, such as timing analysis, test generation and diagnosis. When considering the complexity and tight timing constraints of modern circuits, this correlation affects both the design process and the testing approaches followed in manufacturing. In this work we quantify the diversity of a set of paths (or path segments), let these be critical I/O paths, error propagation paths for various fault models, or paths traced for diagnostic purposes. Circuit paths are encoded using Zero-Suppressed Binary Decision Diagrams (ZBDDs); the proposed method consists Responsible Editor: C. Metra This work was co-funded by the European Regional Development Fund and the Republic of Cyprus through the Research Promotion Foundation (Project NEA Υ O OMH/ TPATH/0308/26). S. N. Neophytou (B) ECE Dept., University of Nicosia, Nicosia, Cyprus e-mail: [email protected] S. N. Neophytou · K. Christou · M. K. Michael KIOS Research Center of Intelligent Systems and Networks, University of Cyprus, Nicosia, Cyprus K. Christou · M. K. Michael ECE Dept., University of Cyprus, Nicosia, Cyprus K. Christou e-mail: [email protected] M. K. Michael e-mail: [email protected] of a sequence of standard ZBDD operations to provide a measure of the overlap of the paths under consideration. The main contribution of the presented method is that, path or path segment enumeration is entirely avoided and, hence, a large number of paths can be considered in practical time. Experimentation using standard benchmark circuits demonstrates the effectiveness of the approach in showing the difference in path correlation between various critical I/O path sets as well as propagation paths during test application.